25.SPI读写W25X40CL - 按k1（20251026已经解决）

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7.25. Continuous Read Mode Reset (CRMR)(FFH)

The Dual/Quad I/O Fast Read operations,“Continuous Read Mode” bits (M7-0) are implemented to further reduce commandoverhead. By setting the (M7-0) to AXH, the next Dual/Quad I/O Fast Readoperations do not require the BBH/EBH/E7H command code.

Because theGD25Q40C has no hardware reset pin, so if Continuous Read Mode bits are set to“AXH”, the GD25Q40C will not recognize any standard SPI commands. So ContinuousRead Mode Reset command will release the Continuous Read Mode from the “AXH”state and allow standard SPI command to be recognized. The command sequence isshow in Figure28

7.25. 连续读取模式重置（CRMR）（FFH） 为了进一步减少命令开销，Dual/Qu I/O Fast Read操作的“连续读取模式”位（M7-0）被实现。通过将（M7-0）设置为AXH，下一个D/Quad I/O Fast Read操作不需要BBH/EBH/E7H命令代码。 由于GD25Q40C没有硬件复位引，因此如果连续读取模式位设置为“AXH”，GD25Q40C将无法识别任何标准SPI命令。因此，连续读取模式重置命令释放“AXH”状态的连续读取模式，并允许识别标准SPI命令。命令序列如图28所示。

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7.26. Read Unique ID (4BH)

The Read Unique ID command accesses afactory-set read-only 128bit number that is unique to each device. The UniqueID can be used in conjunction with user software methods to help preventcopying or cloning of a system.

The Read Unique IDcommand sequence: CS# goes low à sending Read Unique ID command à 3-Byte Address (000000H) àDummy Byteà128bit Unique ID Out àCS# goes high.

7.26.读取唯一ID (4BH) 读取唯一ID命令访问一个工厂设置的只读128位数字，该对每个设备都是唯一的。唯一ID可以与用户软件方法结合使用，以帮助防止系统的复制或克隆。

读取唯一ID命令序列：CS#变低 à 发送读取唯一ID命令 à 3字节地址 (000000H)à 假字节à 128位唯一ID输出à  CS#变高。

这个4BH 命令，有使用价值：

我觉得可以这样写：赶紧写下来，一会儿就忘了这事儿！

#define SFC_WREN        0x06   

#define SFC_RearWYID     0x4B        //PM25LV040 读取唯一ID命令访问一个工厂设置的只读128位数字

//-------------------------------------------------------------------------

#define SPI_CE_High()   P_PM25LV040_CE  = 1     // set CE high

#define SPI_CE_Low()    P_PM25LV040_CE  = 0     // clear CE low

#define SPI_Hold()      P_SPI_Hold      = 0     // clear Hold pin

#define SPI_UnHold()    P_SPI_Hold      = 1     // set Hold pin

#define SPI_WP()        P_SPI_WP        = 0     // clear WP pin

#define SPI_UnWP()      P_SPI_WP        = 1     // set WP pin

//---------------------------------------------------------------------------

u32  PM25LV040_ID0, PM25LV040_ID1, PM25LV040_ID2,PM25LV040_ID3;

/************************************************

使能Flash写命令

入口参数: 无

出口参数: 无

************************************************/

void FlashWriteEnable(void)  //写能使

{

    while(CheckFlashBusy() > 0);    //Flash忙检测,读取回来的数大于0表示忙碌，就一直在这里等待

                                                                        //返回值的最低位表示忙碌，是1的话，肯定整个数大于0

    SPI_CE_Low();

    SPI_WriteByte(SFC_WREN);        //发送写使能命令

    SPI_CE_High();

}

/************************************************************************/

void SPI_WriteByte(u8 out)  //向芯片写入1个8位数

{

    SPDAT = out;

    while(SPIF == 0) ;

    SPIF = 1;   //清SPIF标志

    WCOL = 1;   //清WCOL标志

}

我觉得不需要调用写使能函数，所以先屏蔽，不行再放出来

/************************************************

读取Flash唯一ID

入口参数: 无

出口参数: 无

************************************************/

void  FlashCheckID(void)   //读取芯片唯一ID

{

   

       

    SPI_CE_Low();

    //FlashWriteEnable();  //写能使

    SPI_WriteByte(SFC_RearWYID);        //发送读取ID命令

    SPI_WriteByte(0x00);            //空读3个字节

    SPI_WriteByte(0x00);

    SPI_WriteByte(0x00);

    PM25LV040_ID0   = SPI_ReadByte();         //读取唯一ID第一个32位数

    PM25LV040_ID1   = SPI_ReadByte();         //读取唯一ID第二个32位数

    PM25LV040_ID2   = SPI_ReadByte();         //读取唯一ID第三个32位数

    PM25LV040_ID3   = SPI_ReadByte();         //读取唯一ID第四个32位数

    SPI_CE_High();

}

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7.27. Program/Erase Suspend (PES) (75H)

The Program/Erase Suspend command “75H”,allows the system to interrupt a page program or sector/block erase operationand then read data from any other sector or block. The Write Status Registercommand (01H) and Erase commands (20H, 52H, D8H, C7H, 60H) and Page Programcommand (02H / 32H) are not allowed during Program/Erase suspend. Program/EraseSuspend is valid only during the page program or sector/block erase operation.A maximum of time of “tsus” (See AC Characteristics) is required to suspend theprogram/erase operation.

The Program/EraseSuspend command will be accepted by the device only if the SUS bit in theStatus Register equal to 0 and WIP bit equal to 1 while a Page Program or aSector or Block Erase operation is on-going. If the SUS bit equal to 1 or WIPbit equal to 0, the Suspend command will be ignored by the device. The WIP bitwill be cleared from 1 to 0 within “tsus” and the SUS bit will be set from 0 to1 immediately after Program/Erase Suspend. A power-off during the suspendperiod will reset the device and release the suspend state. The commandsequence is show in Figure30.

7.27. 程序/擦除挂起（PES）（75H） 程序/擦除挂起命令“5H”，允许系统中断页面程序或扇区/块擦除操作，然后从其他任何扇区或块中读取数据。在程序/擦除挂期间，不允许使用写状态寄存器命令（01H）和擦除命令（20H、52H、D8H、C7H、0H）以及页面程序命令（02H / 32H）。程序/擦除挂起仅在页面程序或扇区/块擦除操作有效。暂停程序/擦除操作最多需要“tsus”（参见AC特性）的时间。 只有当状态寄存器中的SUS位等于0且W位等于1时，设备才会接受程序/擦除挂起命令，而页面程序或扇区或块擦除操作正在进行中。如果SUS位等于1WIP位等于0，设备将忽略挂起命令。WIP位将在“tsus”内从1重置为0，程序/擦除挂起后立即SUS位从0设置为1。暂停期间断电将重置设备并释放挂起状态。命令序列如图30所示

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7.28. Program/Erase Resume (PER) (7AH)

The Program/EraseResume command must be written to resume the program or sector/block eraseoperation after a Program/Erase Suspend command. The Program/Erase Resumecommand will be accepted by the device only if the SUS bit equal to 1 and theWIP bit equal to 0. After issued the SUS bit in the status register will becleared from 1 to 0 immediately, the WIP bit will be set from 0 to 1 within200ns and the Sector or Block will complete the erase operation or the pagewill complete the program operation. The Program/Erase Resume command will beignored unless a Program/Erase Suspend is active. The command sequence is showin Figure31.

7.28. 程序/擦除恢复 (PER) (7AH) 程序/擦除恢复命令必须被写入，在程序/擦除挂起命令之后恢复程序或扇区/块擦除操作。只有当SUS位等于1并且WIP位等于0时，设备接受程序/擦除恢复命令。在发出命令后，状态寄存器中的SUS位将立即从1重置为0，WIP位将在200内从0重置为1，扇区或块将完成擦除操作，或者页面将完成编程操作。除非程序/擦除挂起处于活动状态，程序/擦除恢复命令将被忽略。命令序列如图31所示。挂起期间将重置设备并释放挂起状态。命令序列如图30所示

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7.29. Erase Security Registers (44H)

The GD25Q40C provides four 256-byteSecurity Registers which can be read and programmed individually. Theseregisters may be used by the system manufacturers to store security and otherimportant information separately from the main memory array.

The Erase Security Registers command issimilar to Sector/Block Erase command. A Write Enable (WREN) command mustpreviously have been executed to set the Write Enable Latch (WEL) bit.

The Erase SecurityRegisters command sequence: CS# goes low à sending Erase Security Registers command à CS# goes high. The command sequence is shown in Figure31.CS# must be driven high after the eighth bit of the command code has beenlatched in, otherwise the Erase Security Registers command is not executed. Assoon as CS# is driven high, the self-timed Erase Security Registers cycle(whose duration is tSE) is initiated.While the Erase Security Registers cycle is in progress, the Status Registermay be read to check the value of the Write In Progress (WIP) bit. The Write InProgress (WIP) bit is 1 during the self-timed Erase Security Registers cycle,and is 0 when it is completed. At some unspecified time before the cycle iscompleted, the Write Enable Latch (WEL) bit is reset. The Security RegistersLock Bit (LB) in the Status Register can be used to OTP protect the securityregisters. Once the LB bit is set to 1, the Security Registers will bepermanently locked; the Erase Security Registers command will be ignored.

7.29. 擦除安全寄存器 (44H)

GD25Q40C 四个 256 字节的安全寄存器，可以单独读取和编程。这些寄存器可以由系统制造商用来存储安全和其他重要信息，与主内存列分开存储。

擦除安全寄存器命令与扇区/块擦除命令类似。必须先执行写使能（WREN）命令以设置写能寄存器（WEL）位。

擦除安全寄存器命令序列：CS# 变低  发送擦除安全寄存器命令 CS# 变高。命令序列如图31所示。在命令代码的第八位被锁存后，CS# 必须被驱动为高，否则擦除寄存器命令不会执行。一旦 CS# 被驱动为高，自定时擦除安全寄存器周期（其持续时间为 tSE）就开始了。当除安全寄存器周期正在进行时，可以读取状态寄存器以检查写操作进行（WIP）位的值。在自定时擦除安全寄存器期间，写操作进行（WIP）位为 1，完成后为 0。在周期完成之前某个未指定的时间，写使能寄存器（W）位被复位。状态寄存器中的安全寄存器锁定位（LB）可以用来 OTP 保护安全寄存器。一旦 LB 位设置为1，安全寄存器将被永久锁定；擦除安全寄存器命令将被忽略。

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7.30. Program Security Registers (42H)

The Program Security Registers command issimilar to the Page Program command. It allows from 1 to 256 bytes SecurityRegisters data to be programmed. A Write Enable (WREN) command must previouslyhave been executed to set the Write Enable Latch (WEL) bit before sending theProgram Security Registers command. The Program Security Registers command isentered by driving CS# Low, followed by the command code (42H), three addressbytes and at least one data byte on SI. As soon as CS# is driven high, theself-timed Program Security Registers cycle (whose duration is tPP) isinitiated. While the Program Security Registers cycle is in progress, theStatus Register may be read to check the value of the Write In Progress (WIP)bit. The Write In Progress (WIP) bit is 1 during the self-timed ProgramSecurity Registers cycle, and is 0 when it is completed. At some unspecifiedtime before the cycle is completed, the Write Enable Latch (WEL) bit is reset.

If the SecurityRegisters Lock Bit (LB) is set to 1, the Security Registers will be permanentlylocked. Program Security Registers command will be ignored.

7.30. 程序安全寄存器 (42H) 程序安全寄存器命令与页面编程命令类似它允许从1字节到256字节的安全寄存器数据被编程。在发送程序安全寄存器命令之前，必须先执行写使能（W）命令以设置写使能锁存器（WEL）位。程序安全寄存器命令通过将CS#拉低，然后是命令代码（42）、三个地址字节和至少1个数据字节（在SI上）来输入。一旦CS#被拉高，自定时序的程序安全寄存器周期其持续时间为tPP）即启动。当程序安全寄存器周期正在进行时，可以读取状态寄存器以检查写操作进行（WIP）位的值在自定时序的程序安全寄存器周期期间，写操作进行（WIP）位为1，完成后为0。在周期完成之前某个未指定的时间写使能锁存器（WEL）位被复位。 如果安全寄存器锁定位（LB）设置为1，安全寄存器将被永久锁定程序安全寄存器命令将被忽略。

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7.31. Read Security Registers (48H)

The Read SecurityRegisters command is similar to Fast Read command. The command is followed by a3-byte address (A23-A0) and a dummy byte, each bit being latched-in during therising edge of SCLK. Then the memory content, at that address, is shifted outon SO, each bit being shifted out, at a Max frequency fC, during the fallingedge of SCLK. The first byte addressed can be at any location. The address isautomatically incremented to the next higher address after each byte of data isshifted out. Once the A7-A0 address reaches the last byte of the register (ByteFFH), it will reset to 00H, the command is completed by driving CS# high.

7.31. 读取安全寄存器 (48H)

读取安全寄存器命令与快速读取命令类似。命令跟一个3字节地址 (A23-A0) 和一个空字节，每个位在SCLK上升沿时被锁存。然后，在SCL下降沿时，以最大频率fC将地址处的内容移出到SO，每个位在SCLK下降沿时移出。第一个字节地址可以位于任何。数据字节移出后，地址自动递增到下一个更高地址。一旦A7-A0地址达到寄存器的最后一个字节 (字节FFH)，它重置为00H，通过将CS#置高来完成命令。

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7.32. Enable Reset (66H) and Reset (99H)

If the Reset command is accepted, anyon-going internal operation will be terminated and the device will return toits default power-on state and lose all the current volatile settings, such asVolatile Status Register bits, Write Enable Latch status (WEL), Program/EraseSuspend status, Read Parameter setting (P7-P0), Continuous Read Mode bitsetting (M7- M0) and Wrap Bit Setting (W6-W4).

The “Reset (99H)”command sequence as follow: CS# goes low à Sending Enable Reset command à CS# goes high à CS# goes low à Sending Reset command à CS# goes high. Once the Reset command is accepted by thedevice, the device will take approximately tRST/ tRST_E to reset. During this period, no commandwill be accepted. Data corruption may happen if there is an on-going orsuspended internal Erase or Program operation when Reset command sequence isaccepted by the device. It is recommended to check the BUSY bit and the SUS bitin Status Register before issuing the Reset command sequence.

7.32. 启用复位 (66H) 和复位 (99H)

如果复位命令被，任何正在进行的内部操作将被终止，设备将返回到其默认的加电状态，并丢失所有当前的易失性设置，例如易失性状态寄存位、写使能锁存器状态 (WEL)、程序/擦除挂起状态、读取参数设置 (P7-P0)、连续读取模式设置 (M7-M0) 和 Wrap 位设置 (W6-W4)。

“复位 (99H)”命令序列如下：CS# 低à 发送启用复位命令à CS# 变高à CS# 变低 à 发送复位命令 à CS#变高。一旦设备接受了复位命令，设备将需要大约 tRST/ tRST_E 时间来复位。在此期间，设备将不会接受任何命令如果在设备接受复位命令序列时正在进行或挂起的内部擦除或编程操作，可能会发生数据损坏。建议在发出复位命令序列之前检查状态寄存中的 BUSY 位和 SUS 位。

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7.33. Read Serial Flash DiscoverableParameter (5AH)

The Serial FlashDiscoverable Parameter (SFDP) standard provides a consistent method ofdescribing the functional and feature capabilities of serial flash devices in astandard set of internal parameter tables. These parameter tables can beinterrogated by host system software to enable adjustments needed toaccommodate divergent features from multiple vendors. The concept is similar tothe one found in the Introduction of JEDEC Standard, JESD68 on CFI. SFDP is astandard of JEDEC Standard No.216.

7.33. 读取串行闪存可发现参数 (5AH)

串行闪存可发现参数 (SFDP)标准提供了一种一致的方法，用于在标准的一组内部参数表中描述串行闪存设备的功能和特性能力。这些参数表可以通过主机系统软件进行查询，以对多个供应商的不同特性进行调整。这个概念与JEDEC标准简介中找到的JESD68中的CFI类似。SFDP是JEDEC标准216的一部分。

最后把手头的存储芯片手册都放上来：

wuzhe***

刚刚上传的5个存储芯片手册，不知道为什么看不到？好像一个屏幕闪过，说要审核什么的.............


把所有SPI相关理论和存储芯片的命令字，都搞清楚了。

干脆下午重新把程序写一遍，我发现小程序查找错误，还不如重新写来的快