2023/12/14, 内部研发会议决定
计划先在 STC8H2K32U-45MHz-LQFP32, QFN32, TSSOP28, TSSOP20 中先加入 ===老许建议的MDU32C版,好像我也建议过 ===杨老师建议的MDU32D 全面学习中,这好像是64位8051的序曲??? 先筑基 MDU32C,最新为后续STC8系列设计的: SFR SFR | | | | | | | | | | | DMAIR | | |
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| | ARCON | | | | | | | R0 | | | | R1 | | | | R2 | | | | R3 | | | | R4 | | | | R5 | | | | R6 | | | | R7 | | | |
XFR FUNCTION 功能 |
| | | 32b * 32b | {R4, R5, R6, R7} ç {R4, R5, R6, R7} * {R0, R1, R2, R3} Product is limited under 32-bits | | | 32b / 32b(unsigned) | {R4, R5, R6, R7} ç {R4, R5, R6, R7} / {R0, R1, R2, R3} {R4, R5, R6, R7} ç {R4, R5, R6, R7} % {R0, R1, R2, R3} | | | 32b / 32bsigned | {R4, R5, R6, R7} ç {R4, R5, R6, R7} / {R0, R1, R2, R3} {R4, R5, R6, R7} ç {R4, R5, R6, R7} % {R0, R1, R2, R3} | | | 32b Normalize | Shift {R4, R5, R6, R7} left, until the MSB is “1” The shifted bits count will be stored back into SC[5:0] | | | 32b Shift | Shift left or Shift Right according to SRL for SC[5:0] bits | | | ADDC | {R4, R5, R6, R7} ç {R4, R5, R6, R7} + {R0, R1, R2, R3} + CY CY ç Carry from ADDC OV ç Overflow for signed operation ( ( (R4[7]==0) & (R0[7]==0) ) & (SUM[31]==1) ) || ( ( (R4[7]==1) & (R0[7]==1) ) & (SUM[31]==0) ) | | | SUBBC | {R4, R5, R6, R7} ç {R4, R5, R6, R7} - {R0, R1, R2, R3} - CY CY ç Carry from ADDC OV ç Overflow for signed operation ( ( (R4[7]==0) & (R0[7]==0) ) & (SUM[31]==1) ) || ( ( (R4[7]==1) & (R0[7]==1) ) & (SUM[31]==0) ) | | |

老眼昏花,不知上面是不是,杨老师,老许 认可的:
===万里长征第一步,筑基,向 STC64位8051进军
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