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发表于 2024-11-25 12:48:16
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Do you mean compile-time adapt to the clock, or run-time adapt to the clock.
Run-time adapt means you need to pass a clock parameter to the inner loop, and it will have some granularity.
If you really want 1.0 us LSB, the DJNZ opcode is 3 cycles, so a 24~40MHz SYSCLK can only match that within ~ 10%
A 24~40MHz clock and inner DJNZ can more naturally give 10-25us LSB and for that range, you can adjust to within ~1%
It is a pity the 8051 did not implement a WAIT Rn opcode, that would be 1 SYSCLK granular.
There is opcode space to support a WAIT opcode, should STC decide to add one.
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