It looks correct.
There are advantages to using a PNP over a NPN.
a) For the idle case of not transmitting, the PNP is off, and no resistors draw power
b) A slow PNP does not matter, in fact it helps.
The data flows via DI pin, and a delay to disable DE = TX drive, means the TX pin can briefly drive in the idle direction too. That's good to overcome cable capacitance.
At very high speeds, it is OK if the slow PNP never turns off with each bit, as that simply drive the lines fully.
It only needs to turn off before another driver tries to drive.
Note Spice says a 10k/PNP/3k3 combination turns ON in ~ 41ns and OFF in ~ 413ns
A PNP is ok even at 2.5MBd, where OFF time becomes a single bit width.
A NPN choice will cause problems with bit width distortion.
The problems occur when you add the transistor inverter to a RS485 driver.
The details matter.
In the OP circuit of #1, the NPN driver storage time causes bit width distortion.
In the STC circuit, DI is driven by TXD, and the driver disable is driven by PNP.
That means PNP storage delays do not affect the TX width, but they only delay the driver disable slightly.
ie PNP is usable to over 2Mbd
The advantage of adding a PNP device, is you save a pin on the MCU, and you create a form of auto-direction control.
TI actually make parts with inbuilt Auto direction control.
Their appnote SLLA574.pdf
They mention "The driver active time is 0.8-μs in THVD1426 and 8-μs in THVD1406."
|手机版|深圳国芯人工智能有限公司
( 粤ICP备2022108929号-2 )
发表于 2024-3-19 11:56:24
发表于 2024-3-19 20:58:00
发表于 2024-3-20 10:57:34
