神农鼎 发表于 2026-4-18 09:53
24位ADC 工程样品 刚回来，验证准备中，2026/4/15
The 24-bit ADC engineering sample just arrived and is currently undergoing verification preparation. (April 15, 2026)
This is just a 24b ADC test cell chip, not a MCU with included 24b ADC, correct ?
If you are looking to measure ~1ppm ballparks, you can use a PWM DAC with an external buffer gate or analog switch 1G3157 or 1G4157 to remove MCU internal Vcc noise.
Here is an example which uses a Multi-feedback filter to give good stop-band attenutation. If this is fed with 3300Hz PWM it manages ripple under 1ppm, and settles to ~1ppm in under 100ms
A 27MHz clock and 13 bit PWM can give you 8192 test points, each defined to within 1ppm, which should be enough to check linearity.
Another approach using simpler RC filter and modern Dual OpAmp with low offset and low 1/f noise floor.
Similar rise time and lower ripple at ~ 0.2ppm p-p at 3300Hz PWM
The analog switch needs to be good quality, a 1 Ohm offset gives 5.8ppm shift with 82k load.TI's TS5A9411D looks suitable.