神农鼎 发表于 2024-1-15 23:13
感谢为经济发展买了个 硬盘
{:4_250:} STC 的 USB 是用的 内部 USB时钟，12Mbps；
如要转串口，串口的速度是 CPU时钟/4/(65536-重装数)，
如 CPU时钟 40MHz, 转串口的波特率可以 10Mbps
本帖最后由 jmg 于 2024-1-25 03:01 编辑
I downloaded v6.92k version, and Win11 is OK.
Connected to STC-USB-TO-2 and cycled buttons and asked "make target MCU USB-2UART controller'
Message window cycles and reports as below, and 2 UARTS appear in Device manager.
Q: How do I know which HEX version was used forSTC8H8K64U ?Nothing appears to show HEX version ?Where is the HEX file ?
I can see F/W version: 7.4.6U, but I suspect that is USB HID bootloader version number, not the UART HEX version?
Q: which serial port has the best performance ? or are they both identical ?
I jumper S-TXD to S-RXD and start a terminal and connect a counter/timer.
UARTS work, echoes appear on terminal, and I can change BAUD rate to any of 22.1184M/4/N(Baud timing shows crystal error is about -60ppm)
So far. so good. I start stress testing.
115200 Baud drops streamed characters unless I drop the block size to 256 bytes. Even a modest 384 byte block sometimes fails. 10,000 always drops roughly 25 bytes.
Next, I look for what BAUD speed can sustain 10,000 sized block echoes
Results:
22.1184M/4/120 = 46080 9/ans = 195.31us measure 195.3u => 8.n.1 is no dropped chars 10 x 10k blocks << fastest OK speed
22.1184M/4/119 = 46467.22689 9/ans193.684us measure 193.7 => Drops 4 chars in 10 x 10k blocks 40% fail
22.1184M/4/118 = 46861.01695 9/ans192.057us measure 192.0us=> 100% fail Magic threshold, drops chars every time
Compared with other USB-UARTS, that is a quite low echo-block failure speed.
Q: Is this 'working as expected' ?
Q: Is there better, faster code somewhere ?
Addit: Same test using WCH CH9102 (no handshake lines)
WCH CH9102 checks - Simple TX-RX Loopback Echo Block sends
1Mbd sustains 499,573*2100% with 10 x 100k blocks.< 0.1% BW loss
2Mbd sustains 999,062*2100% with 10 x 100k blocks.
4Mbd sustains 1.8941M*2100% with 10 x 100k blocks.-5.15% bandwidth
6Mbd sustains 2.7736M*2100% with 10 x 100k blocks.-7.546% bandwidthConclusion: WCH never drops bytes, but does have a slight bandwidth droop at 4MBd and 6MBd.
The STC8H core is faster than the WCH 8051 core, so STC should be in the same ballpark, instead it fails at much lower speeds ?
Just curious - the report says ".Testing time: 2022-11-1" is that the factory time of calibrate of VREFetc ?
Checking target MCU ...
MCU type: STC8H8K64U
F/W version: 7.4.6U
Current H/W Option:
. ISP-IRC frequency: 24.000MHz
. IRC frequency: 24.000MHz
. Wakeup Timer frequency: 35.325KHz
. Oscillator gain is HIGH
. User EEPROM size is 0.5 K
. Do not detect the level of P3.2 and P3.3 next download
. Power-on reset, use the extra power-on delay
. RESET pin behaves as reset pin
. Interrupt while detect a Low-Voltage
. Thresh voltage level of the built-in LVD : 2.00 V
. Hardware do not enable Watch-Dog-Timer
. Watch-Dog-Timer pre-scalar : 256
. Watch-Dog-Timer stop count in idle mode
. Erase user EEPROM area at next download
. Do not control 485 at next download
. Do not check user password next download
. ICE function is disabled
. Reference voltage: 1189 mV (Range: 1100~1300mV)
. Testing time: 2022-11-1
MCU type: STC8H8K64U
F/W version: 7.4.6U
Erasing MCU flash ...OK !
Programming user code ... OK !
Programming OPTIONS ... OK !
H/W Option upgrade to:
. ISP-IRC frequency: 24.000MHz
. IRC frequency: 11.059MHz
. Wakeup Timer frequency: 35.325KHz
. Oscillator gain is HIGH
. User EEPROM size is 0.5 K
. Do not detect the level of P3.2 and P3.3 next download
. Power-on reset, use the extra power-on delay
. RESET pin behaves as reset pin
. Interrupt while detect a Low-Voltage
. Thresh voltage level of the built-in LVD : 2.00 V
. Hardware do not enable Watch-Dog-Timer
. Watch-Dog-Timer pre-scalar : 256
. Watch-Dog-Timer stop count in idle mode
. Erase user EEPROM area at next download
. Do not control 485 at next download
. Do not check user password next download
. ICE function is disabled
. Reference voltage: 1189 mV (Range: 1100~1300mV)
. Testing time: 2022-11-1
MCU ID : F784C921007F04
MCU type: STC8H8K64U
F/W version: 7.4.6U
. Set frequency: 11.059MHz
. Adjusted frequency: 11.059MHz ( clock divider = 2; )
. Trim error: 0.000%
Complete !(2024-01-24 16:52:38)
gentleman 发表于 2023-11-23 12:21
当然可以这是个双串口工具，用串口的地方都可以
支持STC全系列 Further to #136, I noticed this in another thread.
model: , package TSSOP20; Support: any mainstream baud rate and new popular :
1Mbps/ 1.5Mbps/ 2Mbps/2.5Mbps/3Mbps/4Mbps /5Mbps, 6Mbps/7.5Mbps/8Mbps/9Mbps/10Mbps
The factory comes with a USB to dual serial port program , the complete silk screen name : STC USB-2UART-45I-TSSOP20
So I tested from the other end, with interesting results.
The software related slow-downs are significant, and they interact to mean the dropped bytes effect goes away at high BAUD rates., at least for loopback(?!)
It means between baud rates of 22.1184M/4/42 and 22.1184M/4/120, USB-2UART code fails by dropping character in loopback test.
The bandwidth erosion/overhead is large at high speeds, with many stop bits added as SW delays impact.
It only reaches 50% at around 1Mbd - contrast with WCH CH9102 which only drops -5.15% at 4MBd and -7.546% at 6MBd duplex, and is < 0.1% BW loss at 1Mbd
one strange detail, is 22.1184M/8 or /20 is invalid, whilst 22.1184M/4 /12 /16 /24 /28 etc are fine ?
Loopback test, from highest baud down
Baud 0x00 Sustained average BandwidthResults
10Mbd0.9us 736.975k*2 = 1.473950MBd= 14.739%no failures on 100k blocks(40MHz sysclk /4 ?)
9Mbd 1.0us 658.905k*2 = 1.317810Mbd= 14.642%no failures on 100k blocks(36MHz sysclk /4 ?)
8MBd 1.1/1.2us581.299k*2 = 1.162598Mbd= 14.532%no failures on 100k blocks(32MHz sysclk /4 ?)
7.5Mbd 1.2us 542.266k*2 = 1.084532Mbd= 14.460%no failures on 100k blocks(30MHz sysclk /4 ?)
6MBd 1.5us 425.092k*2 = 850184 = 14.169%no failures on 100k blocks(24MHz sysclk /4 ?)
5MBd 1.8us 605.371k*2 = 1.210742Mbd= 24.214%no failures on 100k blocks(40MHz sysclk /8 bumps % BW ?)
3MBd 3.0us 493.187k*2 = 986374 = 32.879%no failures on 100k blocks(36MHz sysclk /12?)
2.5Mbd 3.6us 515.070k*2 = 1.030140Mbd= 41.205%no failures on 100k blocks(40MHz sysclk /16?)
2Mbd 4.5us 453.835k*2 = 907670 = 45.383%no failures on 100k blocks(40MHz sysclk /20?)
500k 169.974k*2 = 339948 = 67.989%no failures on 100k blocks(40MHz sysclk /80?)
22.1184M/4= 5529600 = 1.627us measure 1.6/1.7us388.223k*2 = 776446 = 14.041%OK
22.1184M/8= 2764800 => reports invalid baudrate
22.1184M/12 = 1843200 = 4.882us measure 4.8/4.9us410.528k*2 = 821056 = 44.545%OK
22.1184M/16 = 1382400 = 6.510us measure 6.5us 392.003k*2 = 784006 = 56.713%OK
22.1184M/20 = 1105920 => reports invalid baudrate
22.1184M/24 = 921600= 9.765us measure 9.6/9.7 235.302k*2 = 470604 = 51.063%OK
22.1184M/28 valid
22.1184M/32 valid
22.1184M/36 = 614400= 14.648us measure 14.6us 181.057k*2 = 362114 = 58.937%OK
22.1184M/48 = 460800 156.778k*2 = 313556 = 68.046%OK
22.1184M/96 = 230400 96.866k*2 = 193732 = 84.085%OK
22.1184M/144 = 153600 69.083k*2 = 138166 = 89.951%OK
22.1184M/156 = 141785 67.703k*2 = 135406 = 95.500%OK
22.1184M/160 = 138240 65.10usmeasure 65us 66.520k*2 = 133040 = 96.238%OK
22.1184M/164 = 134868 66.73usmeasure 66.7us 65.115k*2 = 130230 = 96.560%OK, rare failures.
22.1184M/168 = 131657drops chars !!
22.1184M/192 = 115200drops chars !!
all the way down to the
22.1184M/4/120 below which it starts working ok again.
王子商行 发表于 2024-1-15 21:26
硬盘白买了，今天下载了v6.92k版本，安装一下cdc驱动 win8 也可以识别了，我确定操作步骤和之前一样 之前版 ...
可能之前的STC-ISP版本太低了，附带的CDC驱动不兼容win8
关于一箭双雕，有个不情之请：
本帖最后由 Mr_LG 于 2024-1-27 08:26 编辑我不懂USB，只是要用USB转串口的工具。故非常喜欢“一箭双雕”这款板子！
提个建议：能否利用STC8H2K08U具备串口接收硬件奇偶校验功能，实现：
串口通信之Win32 API 接口中的奇偶校验错捕获。
说明：本人有一应用，需要在PC端捕获串口数据的奇偶校验错(Win32 API接口支持！)。
经测试试，CH340系列芯片转出来的串口，在Win32 API接口中，对奇偶校验错“无感觉”！
而FTDI的芯片(如FT232)就能“感知”到串口上的奇偶校验错。
当然，我还没来得及试一箭双雕是否解决了这个问题。